Cache coherence protocol design using VMSI (Valid Modified Shared Invalid) states

Authors

  • Luma Fayeq Jalil Department of Information Technology, College of Science and Technology, University of Human Development, Sulaymaniyah, Kurdistan Region, Iraq.
  • Maha Abdul kareem H. Al-Rawi Head of programmers oldest Abeer Diaa Al-Nakshabandi, Distribution office At Ministry of Electricity, Baghdad, Iraq.
  • Abeer Diaa Al-Nakshabandi

DOI:

https://doi.org/10.21928/juhd.v3n1y2017.pp274-281

Keywords:

Cache coherence problem, snooping protocol, Directory-Based cache Protocols, VMSI, Cache Simulator, Shared memory, Multi processor, Dev. C

Abstract

We have proposed in this research the design of a new protocol named VMSI coherence protocol in the cache in order to solve the problem of coherence which is the incompatibility of data between caches that appeared in recent multiprocessors system through the operations of reading and writing. The main purpose of this protocol is to increase processor efficiency by reducing traffic between processor and memory that have been achieved through the removal of the write back to the main memory in the case of reading or writing of shared caches because it depends on existing directory inside that cache which contains all the data that represents a subset of main memory.

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Published

2017-03-31

Issue

Vol. 3 No. 1 (2017)

Section

Articles

How to Cite

Cache coherence protocol design using VMSI (Valid Modified Shared Invalid) states. (2017). Journal of University of Human Development, 3(1), 274-281. https://doi.org/10.21928/juhd.v3n1y2017.pp274-281